Integrated circuits are mounted on printed circuit boards. On-board interconnects can connect the integrated circuits (specifically output and/or input drivers of the integrated circuit) to an external device such as but not limited to other on-board devices (integrated or discrete) or a tester.
Modern integrated circuits are expected to output high frequency square wave signals. These signals propagate through the on-board interconnect towards the external device and vice verse.
If a characteristic impedance of the on-board interconnect and an output impedance of the output driver match, the transmitted and reflected high frequency signals propagate in a optimal manner through the on-board interconnect (transmission line) towards the external device. This impedance match can result in a minimum energy loss, optimized power dissipation, reduced noise and optimized transaction latency.
If these mentioned above impedances are not matched, various problems can arise including but not limited to significant signal integrity problems.
Setting strict impedance requirements to the printed circuit board (PCB) manufacturing is costly. This is especially actual in the cases when the PCB manufacturer is required to keep the same transmission line impedance for a group of signals or bus, like, for instance, in the data bits of the memory interfaces.
The integrated circuits manufacturing always has process technology variation, meaning that maintaining the same impedance over the entire process window is hardly achieved. To overcome this problem much over-design and yield loss are involved. In addition, the output driver impedance is always affected from operating conditions such as temperature and power supply voltage. Therefore even when the matching is achieved, it can not be kept over the entire operation period.
Thus, in many occasions the impedance of the output driver of the integrated circuit and the impedance of the on-board interconnect are not matched. This results in significant signal integrity problems, which makes design of the external interfaces of modern integrated circuits more difficult and guaranteeing of the high reliability level is costly.
There is a need to provide a device and method for reducing the mentioned above impedance mismatch and especially to keep this impedance matching over the operation period.